Intel, AMD, Arm, TSMC, Samsung, and a handful of other industry giants have today introduced the new Universal Chiplet Interconnect Express (UCIe) chiplet standard, intending to standardize die-to-die interconnects with an open-source design (via Tom’s Hardware).
The consortium hopes that the UCIe standard will eventually be as universal as other connectivity standards, such as USB, PCIe, and NVMe while providing exceptional power and performance metrics for chiplet connections.
This new UCIe interconnect will enable a standardized connection between chiplets, like cores, memory, and I/O, that looks and operates similar to on-die connections. UCIe is a layered protocol with a physical layer and a die-to-die adapter.
The consortium has outlined very aggressive performance and area targets, and there are many moving parts to tailor the connection for a broad range of uses — not just the highest-end devices. The consortium carves the targets into two broad ranges, with standard 2D packaging techniques and more advanced 2.5D techniques.
The UCIe spec, however, already has a competitor in the Open Compute Project’s Bunch of Wires (BoW) spec, which is designed to also democratize chiplet designs and boasts impressive performance specifications.